Measurement of residual stress in a multi-layer semiconductor heterostructure by micro-Raman spectroscopy

Si-based multilayer structures are widely used in current microelectronics. During their preparation, some inhomogeneous residual stress is induced, resulting in competition between interface mismatching and surface energy and even leading to structure failure. This work presents a methodological study on the measurement of residual stress in a multi-layer semiconductor heterostructure. Scanning electron microscopy（SEM）, micro-Raman spectroscopy（MRS）, and transmission electron microscopy（TEM） were applied to measure the geometric parameters of the multilayer structure. The relationship between the Raman spectrum and the stress/strain on the [100] and [110] crystal orientations was determined to enable surface and crosssection residual stress analyses, respectively. Based on the Raman mapping results, the distribution of residual stress along the depth of the multi-layer heterostructure was successfully obtained.

Architecture, challenges and applications of dynamic reconfigurable computing

As a computing paradigm that combines temporal and spatial computations,dynamic reconfigurable computing provides superiorities of flexibility,energy efficiency and area efficiency,attracting interest from both academia and industry.However,dynamic reconfigurable computing is not yet mature because of several unsolved problems.This work introduces the concept,architecture,and compilation techniques of dynamic reconfigurable computing.It also discusses the existing major challenges and points out its potential applications.

Extraction of temperature dependences of small-signal model parameters in SiGe HBT HICUM model

In this work, temperature dependences of small-signal model parameters in the SiGe HBT HICUM model are presented. Electrical elements in the small-signal equivalent circuit are first extracted at each temperature, then the temperature dependences are determined by the series of extracted temperature coefficients, based on the established temperature for- mulas for corresponding model parameters. The proposed method is validated by a 1x 0.2 x 16 μm2 SiGe HBT over a wide temperature range （from 218 K to 473 K）, and good matching is obtained between the extracted and modeled resuits. Therefore, we believe that the proposed extraction flow of model parameter temperature dependence is reliable for characterizing the transistor performance and guiding the circuit design over a wide temperature range.

Impact of variations of threshold voltage and hold voltage of threshold switching selectors in 1S1R crossbar array

The impact of the variations of threshold voltage（Vth） and hold voltage（Vhold） of threshold switching（TS） selector in1 S1 R crossbar array is investigated. Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors, Vthand Vholdare extracted and their variations distribution expressions are obtained, which are then employed to evaluate the impact on read process and write process in 32×32 1 S1 R crossbar array under different bias schemes. The results indicate that Vthand Vholdvariations of TS selector can lead to degradation of 1 S1 R array performance parameters,such as minimum read/write voltage, bit error rate（BER）, and power consumption. For the read process, a small Vhold variation not only results in the minimum read voltage increasing but it also leads to serious degradation of BER. As the standard deviation of Vholdand Vthincreases, the BER and the power consumption of 1 S1 R crossbar array under 1/2 bias,1/3 bias, and floating scheme degrade, and the case under 1/2 bias tends to be more serious compared with other two schemes. For the write process, the minimum write voltage also increases with the variation of Vholdfrom small to large value. A slight increase of Vthstandard deviation not only decreases write power efficiency markedly but also increases write power consumption. These results have reference significance to understand the voltage variation impacts and design of selector properly.

Interfacial and electrical properties of HfAIO/GaSb metal-oxide-semiconductor capacitors with sulfur passivation

Interfacial and electrical properties of HfA10/GaSb metal-oxide-semiconductor capacitors （MOSCAPs） with sulfur passivation were investigated and the chemical mechanisms of the sulfur passivation process were carefully studied. It was shown that the sulfur passivation treatment could reduce the interface trap density Dit of the HfAIO/GaSb interface by 35% and reduce the equivalent oxide thickness （EOT） from 8 nm to 4 nm. The improved properties are due to the removal of the native oxide layer, as was proven by x-ray photoelectron spectroscopy measurements and high-resolution cross-sectional transmission electron microscopy （HRXTEM） results. It was also found that GaSb-based MOSCAPs with HfA10 gate dielectrics have interfacial properties superior to those using HfO2 or A1203 dielectric layers.

Effects of different dopants on switching behavior of HfO_2-based resistive random access memory

In this study the effects of doping atoms （AI, Cu, and N） with different electro-negativities and ionic radii on resistive switching of HfO2-based resistive random access memory （RRAM） are systematically investigated. The results show that forming voltages and set voltages of A1/Cu-doped devices are reduced. Among all devices, Cu-doped device shows the narrowest device-to-device distributions of set voltage and low resistance. The effects of different dopants on switching behavior are explained with deferent types of CFs formed in HfO2 depending on dopants： oxygen vacancy （Vo） filaments for Al-doped HfO2 devices, hybrid filaments composed of oxygen vacancies and Cu atoms for Cu-doped HfO2 devices, and nitrogen/oxygen vacancy filaments for N-doped HfO2 devices. The results suggest that a metal dopant with a larger electro-negativity than host metal atom offers the best comprehensive performance.

Comparison of total dose effects on SiGe heterojunction bipolar transistors induced by different swift heavy ion irradiation

The degradations in NPN silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） were fully studied in this work, by means of 25-MeV Si, 10-MeV C1, 20-MeV Br, and 10-MeV Br ion irradiation, respectively. Electrical parameters such as the base current （IB）, current gain （β）, neutral base recombination （NBR）, and Early voltage （VA） were investigated and used to evaluate the tolerance to heavy ion irradiation. Experimental results demonstrate that device degradations are indeed radiation-source-dependent, and the larger the ion nuclear energy loss is, the more the displacement damages are, and thereby the more serious the performance degradation is. The maximum degradation was observed in the transistors irradiated by 10-MeV Br. For 20-MeV and 10-MeV Br ion irradiation, an unexpected degradation in Ic was observed and Early voltage decreased with increasing ion fluence, and NBR appeared to slow down at high ion fluence. The degradations in SiGe HBTs were mainly attributed to the displacement damages created by heavy ion irradiation in the transistors. The underlying physical mechanisms are analyzed and investigated in detail.

Suppression of Amplitude Decoherence in Arbitrary n-Level Atom in -Configuration with Bang-Bang Controls

在这篇论文，我们给巨响巨响(BB ) 去耦计划在 Ξ-configuration 在五水平、六水平的原子系统压制振幅 decoherence。我们在 Ξ-configuration 概括这个计划到任意的水平原子系统。相应去耦操作员明确地被给。

Step-Directed Deposition of Au Nanostructures By Electron Beam Evaporation

Au atoms were vaporized by electron beam evaporation, and their subsequent growths on Si (111 ) and highly ordered pyrolytic graphite (HOPG) substrates were studied using atomic force microscopy. Results show that Au nanoparticles tend to nucleate and grow regularly along the step edges of HOPG, however, nanoparticles are distributed homogeneously over the whole Si substrate. The possibility of controlled growth of Au in ultrahigh vacuum with peculiar surface structures was preseuted.

Symmetry ensemble theory of the spin wave emitting effect driven by current in nanoscale magnetic multilayers

This paper proposes a symmetry ensemble model for the magnetic dynamics caused by spin transfer torque in nanoscale pseudo-spin-valves, in which individual spin moments in the free layer are considered as subsystems to form a spinor ensemble. The magnetization dynamics equation of the ensemble was developed. By analytically investigating the equation, many magnetization dynamics properties excited by polarized current reported in experiments, such as double spin wave modes and the abrupt frequency jump, can be successfully explained. It is pointed out that an external field is not necessary for spin wave emitting （SWE） and a novel perpendicular configuration structure can provide much higher SWE efficiency in zero magnetic field.

Study of total ionizing dose radiation effects on enclosed gate transistors in a commercial CMOS technology

This paper studies the total ionizing dose radiation effects on MOS （metal-oxide-semiconductor） transistors with normal and enclosed gate layout in a standard commercial CMOS （compensate MOS） bulk process. The leakage current, threshold voltage shift, and transconductance of the devices were monitored before and after γ-ray irradiation. The parameters of the devices with different layout under different bias condition during irradiation at different total dose are investigated. The results show that the enclosed layout not only effectively eliminates the leakage but also improves the performance of threshold voltage and transconductance for NMOS （n-type channel MOS） transistors. The experimental results also indicate that analogue bias during irradiation is the worst case for enclosed gate NMOS. There is no evident different behaviour observed between normal PMOS （p-type channel MOS） transistors and enclosed gate PMOS transistors.

Decoherence of qubits: results beyond Markovian approximation

In this paper the master equation method is used to calculate the relaxation and decoherence times of a qubit. The results are beyond Markovian approximation, where the noise spectrum is assumed to be wide-band, so that they are valid for not only the wide- but also the narrow-band noises, which may be the main decoherence source in solid-state qubits. Moreover, for some special cases, analytical results can be achieved, which are consistent with those derived by others.

Supercell Approach in Tight-Binding Calculation of Si and Ge Nanowire Bandstructures

Energy bandstructures of [100] oriented Si and Ge quantum nanowires with various cross-sections are calculated by using the sp^3d^5s^＊ tight-binding model with a supercell approach. Results are compared with those obtained by the first principles method （i.e., density functional theory, or DFT）. The differences in the bandstructure between silicon and germanium nanowires are analysed and it is shown that germanium keeps indirect-bandgap and the silicon nanowire along the [100] direction becomes direct-bandgap when the wire diameter shrinks. It is shown in comparison with the available experimental data that the tight-binding method is adequate in predicting the bandstructure parameters relevant to the carrier transport in mesoscopic nanowire devices and is far superior to the DFT method in terms of computational cost.

Comparison of Properties of Pt/PZT/Pt and Ru/PZT/Pt Ferroelectric Capacitors

Pb（Zr0.4Ti0.6）O3 film prepared by sol-gel spin coating on a Pt/Ti/SiO2/Si substrate is applied to ferroelectric capacitors with Pt or Ru as the top electrode. For the Pt/PZT/Pt and Ru/PZT/Pt ferroelectric capacitors, although with the same ferroelectric film, different top electrode materials incur different properties of PZT capacitors, such as fatigue, leakage, remanent and saturated polarization, except the similar crystal orientations of the PZT film. After 10^10 switch cycles, the remanent polarizations of the Ru/PZT/Pt and Pt/PZT/Pt capacitors decrease to 70% and 84%, respectively. The leakage current density of the latter increases obviously at positive bias after 108 switch cycles, compared with the former. Different materials for the top electrode bring different conditions at the PZT/top electrode interface. The influence of oxygen-vacancy concentration at the PZT/electrode interface and the influence of oxides of the electrode material at the PZT/electrode interface to charge injection can explain the difference of properties of the PZT capacitors with Pt or Ru as the top electrodes.

Derivative of Electron Density in Non-Equilibrium Green＇s Function Technique and Its Application to Boost Performance of Convergence

非平衡格林的功能(NEGF ) 技术为量的发展提供一个稳固的基础机械模拟器。然而，集中总是担心大。我们在场在 NEGF 的框架关于电的潜力获得电子密度的精确衍生物的一个一般分析形式体系。这个形式体系不仅在设备模拟，而且罐头在非局部的量现象上提供物理卓见被用来在解决泊松方程当 NEGF 和泊松方程自我一致地被解决时，增加集中的表演建立一个新计划。这个方法被一个 N++N+N++ 电阻器的一个简单一个维的例子说明。全部的模拟时间和重复数字大部分被减少。

Numerical Analysis of Alternating-Current Small-Signal Response in Graphene Nanoribbons

扶手椅 graphene nanoribbons 的交替水流的小信号的进入用非平衡格林的功能的方法被调查。计算交流进入显示出在引入、电容的行为之间的摆动的回答，它是 graphene nanoribbon 的有限长度的结果。交流反应上的使钝化氢的边的效果被表明。在低频率，边效果在金属性的 graphene nanoribbon 把引入的行为转变成电容的。最后，在它的动态反应上的 graphene nanoribbon 的宽度和 bandgap 的变化的效果被调查。[从作者抽象]

Fabrication Process of Sol-Gel Spin Coating for SrBi2Ta2O9 Films Applied to FeRAM

We investigate SrBi2 Ta2 O9 （SBT） films prepared by the sol-gel spin method with different spin rates or different anneal conditions for the first layer of SBT, as promising ferroelectric layer materials applied to ferroelectric random access memory （FeRAM）. All the specimens in this experiment have similar SBT crystal orientations of （115）, （020）, （220）, and （135）. The Pt/SBT/Pt capacitor with coating of 3000rpm spin rate has a perfect rectangle shape of hysteresis loops, remanent polarization of 7.571μC/cm^2 and coercive voltage of 0.816 V at 5 V voltage amplitude. These characteristics are better than those with coating of 3500rpm spin rate, which is attributed to the influence for thickness and grain size of the film from depressed spin rate. Slow-rate anneal in the furnace for the first layer of SBT can improve the crystallization processes and properties for SBT layers slightly, compared with rapid thermal annealing. The ion damage from etching for the top electrode can influence leakage current characteristics of the Pt/SBT/Pt capacitor at positive voltage bias.

Effect of Ion Dose on Growth of Relaxed SiGe Layer on Ion Implantation Si Substrate

Thin strain-relaxed Si0.8Ge0.2 films (57.6 nm) on the 30 keV Ar+ ion implantation Si substrates for different dose (1 × 1014, 5 × 1014, 3 × 1015 cm-2) were grown by ultra high vacuum chemical vapor deposition (UHVCVD) system.Rutherford backscattering/ion channeling (RBS/C), high resolution X-ray diffraction (HRXRD), Raman spectra as well as atomic force microscopy (AFM) were used to characterize these SiGe films. Investigations by RBS/C as well as HRXRD demonstrate that these thin Sio.8Geo.2 films could indeed epitaxially grow on the Ar+ ion implantation Si substrates. Under low dose ( 1 × 1014 cm-2) and medium dose (5 × 1014 cm-2) implantation conditions, the relaxation extents of SiGe films are 60.6% and 63.6%, respectively. However, high dose implantation (3 × 1015 cm-2) prompt the strain in epitaxial SiGe film to be close to full relaxation status (relaxation extent of 96.6% ). On the other hand, determinations of RBS/C also indicate the crystalline quality of SiGe film grown on high dose implantation Si substrate is nearly identical to that grown on low dose (1 × 1014 cm-2) implantation Si substrate.

A new method of fabricating strained Silicon materials

Strain-relaxed SiGe virtual substrates are of great importance for fabricating strained Si materials. Instead of using graded buffer method to obtain fully relaxed SiGe film, in this study a new method to obtain relaxed SiGe film and strained Si film with much thinner SiGe film was proposed. Almost fully relaxed thin SiGe buffer layer was obtained by Si/SiGe/Si multi-structure oxidation and the SiO2 layer removing before SiGe regrowth. Raman spectroscopy analysis indicates that the regrown SiGe film has a strain relaxation ratio of about 93% while the Si cap layer has a strain of 0.63%. AFM shows good surface roughness. This new method is proved to be a useful approach to fabricate thin relaxed epilayers and strain Si films.

Hierarchial Strategy of Testable Design in VLSI System

With the development of VLSI technology, testing design method has been one indispensable fact of the research of VLSI design methodology. Technology of testing design can observably reduce the cost of the chip and help win in time- to-market. Conventional methods of design for test improve the testing performance of the system by modifing the gate-level architecture generally. Re-search in high-level test synthesis has been emphasized on fitting for the trend of high-level VLSI design. In this paper, based on the analysis of different types of testing design methods, a novel compound strategy of design for test in VLSI system is proposed.