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Sub-femto-Joule energy consumption memory device based on van der Waals heterostructure for in-memory computing 被引量:2
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作者 Zi-Jia Su Zi-Hao Xuan +3 位作者 Jing Liu Yi Kang Chun-Sen Liu Cheng-Jie Zuo 《Chip》 2022年第2期35-42,共8页
In-memory computing has carried out calculations in situ within each memory unit and its main power consumption comes from data writ-ing and erasing.Further improvements in the energy efficiency of in-memory computing... In-memory computing has carried out calculations in situ within each memory unit and its main power consumption comes from data writ-ing and erasing.Further improvements in the energy efficiency of in-memory computing require memory devices with sub-femto-Joule energy consumption.Floating gate memory devices based on two-dimensional(2D)material heterostructures have outstanding char-acteristics such as non-volatility,multi-bit storage,and low opera-tion energy,suitable for application in in-memory computing chips.Here,we report a floating gate memory device based on a WSe 2/h-BN/Multilayer-graphene/h-BN heterostructure,the energy consump-tion of which is in sub-femto Joule(0.6 fJ)per operation for pro-gram/erase,and the read power consumption is in the tens of femto Watt(60 fW)range.We show a Hopfield neural network composed of WSe 2/h-BN/Multilayer-graphene/h-BN heterostructure floating gate memory devices,which can recall the original patterns from incorrect patterns.These results shed light on the development of future com-pact and energy-efficient hardware for in-memory computing sys-tems. 展开更多
关键词 two-dimensional material heterostructures nonvolatile memory energy consumption sub-femto-Joule
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