Mobile Edge Computing(MEC) is an emerging technology in 5G era which enables the provision of the cloud and IT services within the close proximity of mobile subscribers.It allows the availability of the cloud servers ...Mobile Edge Computing(MEC) is an emerging technology in 5G era which enables the provision of the cloud and IT services within the close proximity of mobile subscribers.It allows the availability of the cloud servers inside or adjacent to the base station.The endto-end latency perceived by the mobile user is therefore reduced with the MEC platform.The context-aware services are able to be served by the application developers by leveraging the real time radio access network information from MEC.The MEC additionally enables the compute intensive applications execution in the resource constraint devices with the collaborative computing involving the cloud servers.This paper presents the architectural description of the MEC platform as well as the key functionalities enabling the above features.The relevant state-of-the-art research efforts are then surveyed.The paper finally discusses and identifies the open research challenges of MEC.展开更多
Big data processing is becoming a standout part of data center computation. However, latest research has indicated that big data workloads cannot make full use of modern memory systems. We find that the dramatic ineff...Big data processing is becoming a standout part of data center computation. However, latest research has indicated that big data workloads cannot make full use of modern memory systems. We find that the dramatic inefficiency of the big data processing is from the enormous amount of cache misses and stalls of the depended memory accesses. In this paper, we introduce two optimizations to tackle these problems. The first one is the slice-and-merge strategy, which reduces the cache miss rate of the sort procedure. The second optimization is direct-memory-access, which reforms the data structure used in key/value storage. These optimizations are evaluated with both micro-benchmarks and the real-world benchmark HiBench. The results of our micro-benchmarks clearly demonstrate the effectiveness of our optimizations in terms of hardware event counts; and the additional results of HiBench show the 1.21X average speedup on the application-level. Both results illustrate that careful hardware/software co-design will improve the memory efficiency of big data processing. Our work has already been integrated into Intel distribution for Apache Hadoop.展开更多
文摘Mobile Edge Computing(MEC) is an emerging technology in 5G era which enables the provision of the cloud and IT services within the close proximity of mobile subscribers.It allows the availability of the cloud servers inside or adjacent to the base station.The endto-end latency perceived by the mobile user is therefore reduced with the MEC platform.The context-aware services are able to be served by the application developers by leveraging the real time radio access network information from MEC.The MEC additionally enables the compute intensive applications execution in the resource constraint devices with the collaborative computing involving the cloud servers.This paper presents the architectural description of the MEC platform as well as the key functionalities enabling the above features.The relevant state-of-the-art research efforts are then surveyed.The paper finally discusses and identifies the open research challenges of MEC.
文摘Big data processing is becoming a standout part of data center computation. However, latest research has indicated that big data workloads cannot make full use of modern memory systems. We find that the dramatic inefficiency of the big data processing is from the enormous amount of cache misses and stalls of the depended memory accesses. In this paper, we introduce two optimizations to tackle these problems. The first one is the slice-and-merge strategy, which reduces the cache miss rate of the sort procedure. The second optimization is direct-memory-access, which reforms the data structure used in key/value storage. These optimizations are evaluated with both micro-benchmarks and the real-world benchmark HiBench. The results of our micro-benchmarks clearly demonstrate the effectiveness of our optimizations in terms of hardware event counts; and the additional results of HiBench show the 1.21X average speedup on the application-level. Both results illustrate that careful hardware/software co-design will improve the memory efficiency of big data processing. Our work has already been integrated into Intel distribution for Apache Hadoop.
