Characterization of Al_2O_3 /GaN/AlGaN/GaN metalinsulator-semiconductor high electron mobility transistors with different gate recess depths

In this paper, in order to solve the interface-trap issue and enhance the transconductance induced by high-k dielectric in metal-insulator-semiconductor （MIS） high electron mobility transistors （HEMTs）, we demonstrate better performances of recessed-gate A1203 MIS-HEMTs which are fabricated by Fluorine-based Si3N4 etching and chlorine- based A1CaN etching with three etching times （15 s, 17 s and 19 s）. The gate leakage current of MIS-HEMT is about three orders of magnitude lower than that of A1GaN/CaN HEMT. Through the recessed-gate etching, the transconductanee increases effectively. When the recessed-gate depth is 1.02 nm, the best interface performance with Tit----（0.20--1.59） p^s and Dit ：（0.55-1.08）x 1012 cm-2.eV- 1 can be obtained. After chlorine-based etching, the interface trap density reduces considerably without generating any new type of trap. The accumulated chlorine ions and the N vacancies in the AIGaN surface caused by the plasma etching can degrade the breakdown and the high frequency performances of devices. By comparing the characteristics of recessed-gate MIS-HEMTs with different etching times, it is found that a low power chlorine-based plasma etching for a short time （15 s in this paper） can enhance the performances of MIS-HEMTs effectively.

Schottky forward current transport mechanisms in AlGaN/GaN HEMTs over a wide temperature range

The behavior of Schottky contacts in AlGaN/GaN high electron mobility transistors （HEMTs） is investigated by temperature-dependent current-voltage （T-I-V） measurements from 300 K to 473 K. The ideality factor and barrier height determined based on the thermionic emission （TE） theory are found to be strong functions of temperature, while present a great deviation from the theoretical value, which can be expounded by the barrier height inhomogeneities. In order to determine the forward current transport mechanisms, the experimental data are analyzed using numerical fitting method, considering the temperature-dependent series resistance. It is observed that the current flow at room temperature can be attributed to the tunneling mechanism, while thermionic emission current gains a growing proportion with an increase in temperature. Finally, the effective barrier height is derived based on the extracted thermionic emission component, and an evaluation of the density of dislocations is made from the I-V characteristics, giving a value of 1.49 × 10^7 cm^-2.

Interface states in Al_2O_3/AlGaN/GaN metal-oxide-semiconductor structure by frequency dependent conductance technique

Frequency dependent conductance measurements are implemented to investigate the interface states in Al2O3/A1GaN/GaN metal-oxide-semiconductor （MOS） structures. Two types of device structures, namely, the recessed gate structure （RGS） and the normal gate structure （NGS）, are studied in the experiment. Interface trap parameters includ-ing trap density Dit, trap time constant ιit, and trap state energy ET in both devices have been determined. Furthermore, the obtained results demonstrate that the gate recess process can induce extra traps with shallower energy levels at the Al2O3/AlGaN interface due to the damage on the surface of the AlGaN barrier layer resulting from reactive ion etching （RIE）.

The reliability of AlGaN/GaN high electron mobility transistors under step-electrical stresses

In spite of their extraordinary performance, AlGaN/GaN high electron mobility transistors （HEMTs） still lack solid reliability. Devices under accelerated DC stress tests （off-state, VDS = 0 state, and on-state step-stress） are investigated to help us identify the degradation mechanisms of the AlGaN/GaN HEMTs. All our findings are consistent with the degradation mechanism based on crystallographic-defect formation due to the inverse piezoelectric effects in Ref. [1] （Joh J and del Alamo J A 2006 IEEE IDEM Tech. Digest p. 415）. However, under the on-state condition, the devices are suffering from both inverse piezoelectric effects and hot electron effects, and so to improve the reliability of the devices both effects should be taken into consideration.

Physically based analytical model for plateau in gate C-V characteristics of strained silicon pMOSFET

A physically based analytical model was developed to predict the performance of the plateau observed in the gate C-V characteristics of strained-Si/SiGe pMOSFET.Experimental results were used to validate this model.The extracted parameters from our model were tOX=20 nm,ND=1×1016cm 3,tSSi=13.2 nm,consistent with the experimental values.The results show that the simulation results agree with experimental data well.It is found that the plateau can be strongly affected by doping concentration,strained-Si layer thickness and mass fraction of Ge in the SiGe layer.The model has been implemented in the software for strained silicon MOSFET parameter extraction,and has great value in the design of the strained-Si/SiGe devices.

1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor

In this paper, we present a 1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor(DH HEMT) with a gate-drain spacing L_(GD)= 18.8 μm. Compared with the regular DH HEMT, our circular structure has a high average breakdown electric-field strength that increases from 0.42 MV/cm to 0.96 MV/cm. The power figure of meritV_(BR)~2/RON for the circular HEMT is as high as 1.03 ×10~9 V^2·Ω^(-1)·cm^(-2). The divergence of electric field lines at the gate edge and no edge effect account for the breakdown enhancement capability of the circular structure. Experiments and analysis indicate that the circular structure is an effective method to modulate the electric field.

High temperature characteristics of AlGaN/GaN high electron mobility transistors

Direct current （DC） and pulsed measurements are performed to determine the degradation mechanisms of A1GaN/GaN high electron mobility transistors （HEMTs） under high temperature. The degradation of the DC characteristics is mainly attributed to the reduction in the density and the mobility of the two-dimensional electron gas （2DEG）. The pulsed measurements indicate that the trap assisted tunneling is the dominant gate leakage mechanism in the temperature range of interest. The traps in the barrier layer become active as the temperature increases, which is conducive to the electron tunneling between the gate and the channel. The enhancement of the tunneling results in the weakening of the current collapse effects, as the electrons trapped by the barrier traps can escape more easily at the higher temperature.

The degradation mechanism of an AlGaN/GaN high electron mobility transistor under step-stress

Step-stress experiments are performed in this paper to investigate the degradation mechanism of an AIGaN/GaN high electron mobility transistor （HEMT）. It is found that the stress current shows a recoverable decrease during each voltage step and there is a critical voltage beyond which the stress current starts to increase sharply in our experiments. We postulate that defects may be randomly induced within the A1GaN barrier by the high electric field during each voltage step. But once the critical voltage is reached, the trap concentration will increase sharply due to the inverse piezoelectric effect. A leakage path may be introduced by excessive defect, and this may result in the permanent degradation of the A1GaN/GaN HEMT.

Field plate structural optimization for enhancing the power gain of GaN-based HEMTs

A novel source-connected field plate structure, featuring the same photolithography mask as the gate electrode, is proposed as an improvement over the conventional field plate （FP） techniques to enhance the frequency performance in GaN-based HEMTs. The influences of the field plate on frequency and breakdown performance are investigated simul- taneously by using a two-dimensional physics-based simulation. Compared with the conventional T-gate structures with a field plate length of 1.2 gm, this field plate structure can induce the small signal power gain at 10 GHz to increase by 5-9.5 dB, which depends on the distance between source FP and dramatically shortened gate FE This technique minimizes the parasitic capacitances, especially the gate-to-drain capacitance, showing a substantial potential for millimeter-wave, high power applications.

Kink effect in AlGaN/GaN high electron mobility transistors by electrical stress

The kink effect is studied in an AlGaN/GaN high electron mobility transistor by measuring DC performance during fresh, short-term stress and recovery cycle with negligible degradation. Vdg plays an assistant role in detrapping electrons and short-term stress results in no creation of new category traps but an increase in number of active traps. A possible mechanism is proposed that electrical stress supplies traps with the electric field for activation and when device is under test field-assisted hot-electrons result in electrons detrapping from traps, thus deteriorating the kink effect. In addition, experiments show that the impact ionization is at a relatively low level, which is not the dominant mechanism compared with trapping effect. We analyse the complicated link between the kink effect and stress bias through groups of electrical stress states： Pals = 0-state, off-state, on-state （on-state with low voltage, high-power state, high field state）. Finlly, a conclusion is drawn that electric field brings about more severe kink effect than hot electrons. With the assistance of electric field, hot electrons tend to be possible to modulate the charges in deep-level trap.

An improved EEHEMT model for kink effect on AlGaN/GaN HEMT

In this paper, a new current expression based on both the direct currect （DC） characteristics of the A1GaN/GaN high election mobility transistor （HEMT） and the hyperbolic tangent function tanh is proposed, by which we can describe the kink effect of the A1GaN/GaN HEMT well. Then, an improved EEHEMT model including the proposed current expression is presented. The simulated and measured results of Ⅰ-Ⅴ, S-parameter, and radio frequency （RF） large-signal characteristics are compared for a self-developed on-wafer A1GaN/GaN HEMT with ten gate fingers each being 0.4-μm long and 125-p-m wide （Such an A1GaN/GaN HEMT is denoted as A1GaN/GaN HEMT （10 × 125 μm））. The improved large signal model simulates the Ⅰ-Ⅴ characteristic much more accurately than the original one, and its transconductance and RF characteristics are also in excellent agreement with the measured data.

Kink effect in current–voltage characteristics of a GaN-based high electron mobility transistor with an AlGaN back barrier

The kink effect in current-voltage （IV） characteristic s seriously deteriorates the performance of a GaN-based HEMT. Based on a series of direct current （DC） IV measurements in a GaN-based HEMT with an AlGaN back barrier, a possible mechanism with electron-trapping and detrapping processes is proposed. Kink-related deep levels are activated by a high drain source voltage （Vds） and located in a GaN channel layer. Both electron trapping and detrapping processes are accomplished with the help of hot electrons from the channel by impact ionization. Moreover, the mechanism is verified by two other DC IV measurements and a model with an expression of the kink current.

Improved performance of AlGaN/GaN HEMT by N_2O plasma pre-treatment

The influence of an N2O plasma pre-treatment technique on characteristics of AlGaN/GaN high electron mobility transistor（HEMT） prepared by using a plasma-enhanced chemical vapor deposition（PECVD） system is presented.After the plasma treatment,the peak transconductance（gm） increases from 209 mS/mm to 293 mS/mm.Moreover,it is observed that the reverse gate leakage current is lowered by one order of magnitude and the drain current dispersion is improved in the plasma-treated device.From the analysis of frequency-dependent conductance,it can be seen that the trap state density（DT） and time constant（τT） of the N20-treated device are smaller than those of a non-treated device.The results indicate that the N2O plasma pre-pretreatment before the gate metal deposition could be a promising approach to enhancing the performance of the device.

Channel temperature determination of a multifinger AlGaN/GaN high electron mobility transistor using a micro-Raman technique

Self-heating in a multifinger A1GaN/GaN high electron mobility transistor （HEMT） is investigated by micro-Raman spectroscopy, The device temperature is probed on the die as a function of applied bias. The operating temperature of the A1GaN/GaN HEMT is estimated from the calibration curve of a passively heated A1GaN/GaN structure. A linear increase of junction temperature is observed when direct current dissipated power is increased. When the power dissipation is 12.75 W at a drain voltage of 15 V, a peak temperature of 69.1 ℃ is observed at the gate edge on the drain side of the central finger. The position of the highest temperature corresponds to the high-field region at the gate edge.

Double-gate tunnel field-effect transistor:Gate threshold voltage modeling and extraction

The tunnel field-effect transistor(TFET) is a potential candidate for the post-CMOS era.As one of the most important electrical parameters of a device,double gate TFET(DG-TFET) gate threshold voltage was studied.First,a numerical simulation study of transfer characteristic and gate threshold voltage in DG-TFET was reported.Then,a simple analytical model for DG-TFET gate threshold voltage VTG was built by solving quasi-two-dimensional Poisson equation in Si film.The model as a function of the drain voltage,the Si layer thickness,the gate length and the gate dielectric was discussed.It is shown that the proposed model is consistent with the simulation results.This model should be useful for further investigation of performance of circuits containing TFETs.

Breakdown voltage enhancement in GaN channel and AlGaN channel HEMTs using large gate metal height

A large gate metal height technique is proposed to enhance breakdown voltage in GaN channel and AlGaN channel high-electron-mobility-transistors(HEMTs).For GaN channel HEMTs with gate-drain spacing LGD=2.5μm,the breakdown voltage VBR increases from 518 V to 582 V by increasing gate metal height h from 0.2μm to 0.4μm.For GaN channel HEMTs with LGD=7μm,VBR increases from 953 V to 1310 V by increasing h from 0.8μm to 1.6μm.The breakdown voltage enhancement results from the increase of the gate sidewall capacitance and depletion region extension.For Al0.4Ga0.6N channel HEMT with LGD=7μm,VBR increases from 1535 V to 1763 V by increasing h from 0.8μm to 1.6μm,resulting in a high average breakdown electric field of 2.51 MV/cm.Simulation and analysis indicate that the high gate metal height is an effective method to enhance breakdown voltage in GaN-based HEMTs,and this method can be utilized in all the lateral semiconductor devices.

Electric-stress reliability and current collapse of different thickness SiN_x passivated AlGaN/GaN high electron mobility transistors

This paper investigates the impact of electrical degradation and current collapse on different thickness SiNx passivated AlGaN/GaN high electron mobility transistors. It finds that higher thickness SiNx passivation can significantly improve the high-electric-field reliability of a device. The degradation mechanism of the SiNx passivation layer under ON-state stress has also been discussed in detail. Under the ON-state stress, the strong electric-field led to degradation of SiNx passivation located in the gate-drain region. As the thickness of SiNx passivation increases, the density of the surface state will be increased to some extent. Meanwhile, it is found that the high NH3 flow in the plasma enhanced chemical vapour deposition process could reduce the surface state and suppress the current collapse.

Investigation of dislocations in 8° off-axis 4H-SiC epilayer

This paper reports that the etching morphology of dislocations in 8° off-axis 4H-SiC epilayer is observed by using a scanning electronic microscope. It is found that different types of dislocations correspond with different densities and basal plane dislcation （BPD） array and threading edge dislocation （TED） pileup group lie along some certain crystal directions in the epilayer. It is concluded that the elastic energy of threading screw dislocations （TSDs） is highest and TEDs is lowest among these dislocations, so the density of TSDs is lower than TEDs. The BPDs can convert to TEDs but TSDs can only propagate into the epilyer in spite of the higher elastic energy than TEDs. The reason of the form of BPDs array in epilayer is that the big step along the basal plane caused by face defects blocked the upstream atoms, and TEDs pileup group is that the dislocations slide is blocked by dislocation groups in epilayer.

Characteristics and parameter extraction for NiGe/n-type Ge Schottky diode with variable annealing temperatures

Current transport mechanism in Ni-germanide/n-type Ge Schottky diodes is investigated using current-voltage characterisation technique with annealing temperatures from 300 ℃ to 500℃. Based on the current transport model, a simple method to extract parameters of the NiGe/Ge diode is presented by using the I-V characteristics. Parameters of NiGe/n-type Ge Schottky diodes fabricated for testing in this paper are as follows： the ideality factor n, the series resistance Rs, the zero-field barrier height Фb0, the interface state density Dit, and the interracial layer capacitance Ci. It is found that the ideality factor n of the diode increases with the increase of annealing temperature. As the temperature increases, the interface defects from the sputtering damage and the penetration of metallic states into the Ge energy gap are passivated, thus improving the junction quality. However, the undesirable crystallisations of Ni-germanide are observed together with NiGe at a temperature higher than 400℃. Depositing a very thin （-1 nm） heavily Ge-doped n＋ Ge intermediate layer can improve the NiGe film morphology significantly.

High-efficiency S-band harmonic tuning GaN amplifier

In this paper, we present a high-efficiency S-band gallium nitride （GaN） power amplifier （PA）. This amplifier is fabri- cated based on a self-developed GaN high-electron-mobility transistor （HEMT） with 10 mm gate width on SiC substrate. Harmonic manipulation circuits are presented in the amplifier. The matching networks consist of microstrip lines and discrete components. Open-circuited stub lines in both input and output are used to tune the 2rid harmonic wave and match the GaN HEMT to the highest efficiency condition. The developed amplifier delivers an output power of 48.5 dBm （70 W） with a power-added efficiency （PAE） of 72.2% at 2 GHz in pulse condition. When operating at 1.8-2.2 GHz （20% relative bandwidth）, the amplifier provides an output power higher than 48 dBm （,-~ 65 W）, with a PAE over 70% and a power gain above 15 dB. When operating in continuous-wave （CW） operating conditions, the amplifier gives an output power over 46 dBm （40 W） with PAE beyond 60% over the whole operation frequency range.