A More Effective Method of Extracting the Characteristic Value of Pulse Wave Signal Based on Wavelet Transform

Pulse wave contains human physiological and pathological information. Different people will exhibit different characteristics, and hence determining the characteristic points of the pulse wave of human physiological health makes sense. It is common that we extract the characteristic value of pulse wave signal with the method based on wavelet transform on a small scale, and then determine the locations of the characteristic points by modulus maxima and modulus minima. Before determining characteristic value by detecting modulus maxima and modulus minima, we need to determine every period of the pulse wave. This paper presents a new kind of adaptive threshold determination method which is more effective. It can accurately determine every period of the pulse wave, and then extract characteristic values by modulus maxima and modulus minima in every period of the pulse wave. The method presented in this paper promotes the research utilizing pulse wave on health life.

A continuous analytic channel potential solution to doped symmetric double-gate MOSFETs from the accumulation to the strong-inversion region

A continuous yet analytic channel potential solution is proposed for doped symmetric double-gate （DG） MOSFETs from the accumulation to the strong-inversion region. Analytical channel potential relationship is derived from the complete 1-D Poisson equation physically, and the channel potential solution of the DG MOSFET is obtained analytically. The extensive comparisons between the presented solution and the numerical simulation illustrate that the solution is not only accurate and continuous in the whole operation regime of DG MOSFETs, but also valid to wide doping concentration and various geometrical sizes, without employing any fitting parameter.

Design and implementation of a high sensitivity fully integrated passive UHF RFID tag

A fully integrated passive UHF RFID tag complying with the ISO 18000-6B protocol is presented, which includes an analog front-end, a baseband processor, and an EEPROM memory. To extend the communication range, a high efficiency differential-drive CMOS rectifier is adopted. A novel high performance voltage limiter is used to provide a stable limiting voltage, with a 172 mV voltage variation against temperature variation and process dispersion. The dynamic band-enhancement technique is used in the regulator circuit to improve the regulating capacity. A rail-to-rail hysteresis comparator is adopted to demodulate the signal correctly in any condition. The whole transponder chip is implemented in a 0.18μm CMOS process, with a die size of 900 × 800 μm2. Our measurement results show that the total power consumption of the tag chip is only 6.8 μW, with a sensitivity of -13.5 dBm.

One-dimensional continuous analytic potential solution to generic oxide-silicon-oxide system

A one-dimensional continuous analytic potential solution to a generic oxide-silicon^xide system is developed. With the analytic solution, the potential distribution in the silicon film is predicted. A physics-based relation between surface potentials is also derived and then applied to the generic oxide-silicon-oxide metal oxide-semiconductor field-effect transistors （MOSFETs） for the calculation of surface potentials

An oxide/silicon core/shell nanowire metal-oxide semiconductor field-effect transistor

This paper studies an oxide/silicon core/shell nanowire MOSFET （OS-CSNM）. Through three-dimensional device simulations, we have demonstrated that the OS-CSNM has a lower leakage current and higher Ion/Ioff ratio after intro- ducing the oxide core into a traditional nanowire MOSFET （TNM）. The oxide/silicon OS-CSNM structure suppresses threshold voltage roll-off, drain induced barrier lowering and subthreshold swing degradation. Smaller intrinsic device delay is also observed in OS-CSNM in comparison with that of TNM.

Noninvasive Blood Glucose Measurement Based on NIR Spectrums and Double ANN Analysis

This paper presents a new noninvasive blood glucose monitoring method based on four near infrared spectrums and double artificial neural network analysis. We choose four near infrared wavelengths, 820 nm, 875 nm, 945 nm, 1050 nm, as transmission spectrums, and capture four fingers transmission PPG signals simultaneously. The wavelet transform algorithm is used to remove baseline drift, smooth signals and extract eight eigenvalues of each PPG signal. The eigenvalues are the input parameters of double artificial neural network analysis model. Double artificial neural network regression combines the classification recognition algorithm with prediction algorithm to improve the accuracy of measurement. Experiments show that the root mean square error of the prediction is between 0.97 mg/dL - 6.69 mg/dL, the average of root mean square error is 3.80 mg/dL.

Luminous efficacy of white LED in the mesopic vision state

The traditional eye sensitivity function based on photopic vision is not applicable in the mesopic vision state.The mesopic vision is studied by using the photopic and scotopic vision state sensitivity functions.And the model which links the mesopic sensitivity with the photopic and scotopic states is built.Based on the model,the luminous efficacy of mesopic vision is calculated and applied to the spectrum distribution of LED light sources.The results show that the luminous efficacy of a commercial YAG phosphor converted white LED is up to 172.7 lm/W at mesopic vision,which is 67.2% higher than that of photopic vision state.We also conclude that the optimal spectral power distribution of the LED will greatly increase the mesopic luminous efficacy.

Continuous surface potential versus voltage equation of intrinsic surrounding-gate MOSFETs and analytic solution from accumulation to strong inversion region

A continuous surface potential versus voltage equation is proposed and then its solution is further discussed for a long channel intrinsic surrounding-gate（SRG） MOSFET from the accumulation to strong inversion region.The original equation is derived from the exact solution of a simplified Poisson equation and then the empirical correction is performed from the mathematical condition required by the continuity of the solution,which results in a continuous surface potential versus voltage equation,allowing the surface potential and the related derivatives to be described by an analytic solution from the accumulation to strong inversion region and from linear to the saturation region accurately and continuously.From these results,the dependences of surface potential and centric potential characteristics on device geometry are analyzed and the results are also verified with the 3-D numerical simulation from the aspect of accuracy and continuity tests.

Study and analysis of coefficient mismatch in a MASH21 sigma—delta modulator

The quantization noise leakage of the first stage in a MASH21 sigma-delta modulator is analyzed. The results show that the finite DC gain of the opamp is the main reason for noise leakage, and finite GBW and SR only generate harmonic distortion. The relationship between DC gain and leakage is modeled and conclusions on design criteria are reached. As an example, a MASH21 modulator for a digital audio application is realized. This modulator, fabricated in an 0.18 μm mixed signal process, achieves an SNDR of 91 dB with 1.8 V supply, which verifies the analysis and design criteria.

Design and implementation of an ultra-low power passive UHF RFID tag

This paper presents a fully integrated passive UHF RFID tag chip complying with the ISO18000-6B protocol.The tag chip includes an RF/analog front-end,a baseband processor,and a 512-bit EEPROM memory.To improve power conversion efficiency,a Schottky barrier diode based rectifier is adopted.A novel voltage reference using the peaking current source is discussed in detail,which can meet the low-power,low-voltage requirement while retaining circuit simplicity.Most of the analog blocks are designed to work under sub-1 V to reduce power consumption,and several practical methods are used to further reduce the power consumption of the baseband processor.The whole tag chip is implemented in a TSMC 0.18μm CMOS process with a die size of 800×800μm;. Measurement results show that the total power consumption of the tag chip is only 7.4μW with a sensitivity of -12 dBm.

Clear correspondence between gated-diode R-G current and performance degradation of SOI n-MOSFETs after F-N stress tests

A clear correspondence between the gated-diode generation-recombination （R-G） current and the performance degradation of an SOI n-channel MOS transistor after F-N stress tests has been demonstrated. Due to the increase of interface traps after F-N stress tests, the R-G current of the gated-diode in the SOI-MOSFET architecture increases while the performance characteristics of the MOSFET transistor such as the saturation drain current and sub-threshold slope are degraded. From a series of experimental measurements of the gated-diode and SOI-MOSFET DC characteristics, a linear decrease of the drain saturation current and increase of the threshold voltage as well as a like-line rise of the sub-threshold swing and a corresponding degradation in the trans-conductance are also observed. These results provide theoretical and experimental evidence for us to use the gated-diode tool to monitor SOI-MOSFET degradation.

Machine Learning Aided Key-Guessing Attack Paradigm Against Logic Block Encryption

Hardware security remains as a major concern in the circuit design flow.Logic block based encryption has been widely adopted as a simple but effective protection method.In this paper,the potential threat arising from the rapidly developing field,i.e.,machine learning,is researched.To illustrate the challenge,this work presents a standard attack paradigm,in which a three-layer neural network and a naive Bayes classifier are utilized to exemplify the key-guessing attack on logic encryption.Backed with validation results obtained from both combinational and sequential benchmarks,the presented attack scheme can specifically accelerate the decryption process of partial keys,which may serve as a new perspective to reveal the potential vulnerability for current anti-attack designs.

Diode parameter extraction by a linear cofactor difference operation method

The linear cofactor difference operator（LCDO） method,a direct parameter extraction method for general diodes,is presented.With the developed LCDO method,the extreme spectral characteristic of the diode voltage-current curves is revealed,and its extreme positions are related to the diode characteristic parameters directly.The method is applied to diodes with different sizes and temperatures,and the related characteristic parameters,such as reverse saturation current,series resistance and non-ideality factor,are extracted directly.The extraction result shows good agreement with the experimental data.

Forward gated-diode method for parameter extraction of MOSFETs

The forward gated-diode method is used to extract the dielectric oxide thickness and body doping concentration of MOSFETs, especially when both of the variables are unknown previously. First, the dielectric oxide thickness and the body doping concentration as a function of forward gated-diode peak recombination-generation （R-G） current are derived from the device physics. Then the peak R-G current characteristics of the MOSFETs with different dielectric oxide thicknesses and body doping concentrations are simulated with ISE-Dessis for parameter extraction. The results from the simulation data demonstrate excellent agreement with those extracted from the forward gated-diode method.

Superiority of zoom lens coupling in designing a novel X-ray image detector

We design a novel X-ray image detector by lens coupling a Gd2O2S：Tb intensifying screen with a high performance low-light-level （L^3, which often means luminescence less than 10^-3 Lux） image intensifier. Different coupling effects on imaging performance between zoom lens and fix-focus lens are analyzed theoretically. In experiment, for designing a detector of 15-inch visual field, the system coupled by zoom lens is of 12.25-lp/cm resolution, while the one with fix-focus lens is 10 lp/cm. The superiority of zoom lens is validated. It is concluded that zoom lens preserves the image information better than fix-focus lens and improves the imaging system＇s performance in this design, which is referential to the design of other optical imaging systems.

Contact size scaling of a W-contact phase-change memory cell based on numerical simulation

In the design of phase-change memory（PCM）,it is important to perform numerical simulations to predict the performances of different device structures.This work presents a numerical simulation using a coupled system including Poisson＇s equation,the current continuity equation,the thermal conductivity equation,and phase-change dynamics to simulate the thermal and electric characteristics of phase-change memory.This method discriminates the common numerical simulation of PCM cells,from which it applies Possion＇s equation and current continuity equations instead of the Laplace equation to depict the electric characteristics of PCM cells,which is more adoptable for the semiconductor characteristics of phase-change materials.The results show that the simulation agrees with the measurement,and the scalability of PCM is predicted.

An RF power amplifier with inter-metal-shuffled capacitor for inter-stage matching in a digital CMOS process

One challenge of the implementation of fully-integrated RF power amplifiers into a deep submicro digital CMOS process is that no capacitor is available,especially no high density capacitor.To address this problem,a two-stage class-AB power amplifier with inter-stage matching realized by an inter-metal coupling capacitor is designed in a 180-nm digital CMOS process.This paper compares three structures of inter-metal coupling capacitors with metal-insulator-metal（MIM） capacitor regarding their capacitor density.Detailed simulations are carried out for the leakage,the voltage dependency,the temperature dependency,and the quality factor between an inter-metal shuffled（IMS） capacitor and an MIM capacitor.Finally,an IMS capacitor is chosen to perform the inter-stage matching.The techniques are validated via the design and implement of a two-stage class-AB RF power amplifier for an UHF RFID application.The PA occupies 370 × 200 μm^2 without pads in the 180-nm digital CMOS process and outputs 21.1 dBm with 40% drain efficiency and 28.1 dB power gain at 915 MHz from a single 3.3 V power supply.

Benchmark tests on symmetry and continuity characteristics between BSIM4 and ULTRA-BULK

This paper presents the benchmark test results on the symmetry and continuity characteristics between BSIM4 from Berkeley and ULTRA-BULK from Peking University. It is shown that the industry standard model BSIM4 has a series of the shortcomings of the continuity and symmetry, such as the charge, high-order current derivatives, and the trans-capacitances while the latest advanced surface-potential based MOSFET compact model, ULTRA-BULK, demonstrates all necessary continuity and symmetry characteristics, which are very important for analog and RF circuit design.

Sigma-delta modulator modeling analysis and design

This paper introduces a new method for SC sigma-delta modulator modeling.It studies the integrator＇s different equivalent circuits in the integrating and sampling phases.This model uses the OP-AMP input pair＇s tail current（I_0） and overdrive voltage（v_（on）） as variables.The modulator＇s static and dynamic errors are analyzed.A group of optimized I0 and von for maximum SNR and power x area ratio can be obtained through this model.As examples, a MASH21 modulator for digital audio and a second order modulator for RFID baseband are implemented and tested, and they can achieve 91 dB and 72 dB respectively,which verifies the modeling and design criteria.

A voltage regulator system with dynamic bandwidth boosting for passive UHF RFID transponders

This paper presents a voltage regulator system for passive UHF RFID transponders, which contains a rectifier, a limiter, and a regulator. The rectifier achieves power by rectifying the incoming RF energy. Due to the huge variation of the rectified voltage, a limiter at the rectifier output is used to clamp the rectified voltage. In this paper, the design of a limiter circuit is discussed in detail, which can provide a stable limiting voltage with low sensitivity to temperature variation and process dispersion. The key aspect of the voltage regulator system is the dynamic bandwidth boosting in the regulator. By sensing the excess current that is bypassed in the limiter during periods of excess energy, the bias current as well as the bandwidth of the regulator are increased, the output supply voltage can recover quickly from line transients during the periods of no RF energy to a full blast of RF energy. This voltage regulator system is implemented in a 0.18μm CMOS process.