Effect of cryogenic temperature characteristics on 0.18-μm silicon-on-insulator devices

The experimental results of the cryogenic temperature characteristics on 0.18-μm silicon-on-insulator（SOI） metaloxide-silicon（MOS） field-effect-transistors（FETs） were presented in detail. The current and capacitance characteristics for different operating conditions ranging from 300 K to 10 K were discussed. SOI MOSFETs at cryogenic temperature exhibit improved performance, as expected. Nevertheless, operation at cryogenic temperature also demonstrates abnormal behaviors, such as the impurity freeze-out and series resistance effects. In this paper, the critical parameters of the devices were extracted with a specific method from 300 K to 10 K. Accordingly, some temperature-dependent-parameter models were created to improve fitting precision at cryogenic temperature.

Total ionizing radiation-induced read bit-errors in toggle magnetoresistive random-access memory devices

The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories（MRAMs） with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor（CMOS） process respectively and different magnetic tunneling junctions（MTJs） are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad（Si） in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13-μm process circuit exhibits better radiation tolerance than the 0.18-μm process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.

Degradation of current–voltage and low frequency noise characteristics under negative bias illumination stress in InZnO thin film transistors

The instabilities of indium–zinc oxide thin film transistors under bias and/or illumination stress are studied in this paper. Firstly, illumination experiments are performed, which indicates the variations of current–voltage characteristics and electrical parameters（such as threshold voltage and sub-threshold swing） are dominated by the stress-induced ionized oxygen vacancies and acceptor-like states. The dependence of degradation on light wavelength is also investigated. More negative shift of threshold voltage and greater sub-threshold swing are observed with the decrease of light wavelength.Subsequently, a negative bias illumination stress experiment is carried out. The degradation of the device is aggravated due to the decrease of recombination effects between ionized oxygen vacancies and free carriers. Moreover, the contributions of ionized oxygen vacancies and acceptor-like states are separated by using the mid-gap method. In addition, ionized oxygen vacancies are partially recombined at room temperature and fully recombined at high temperature. Finally, low-frequency noise is measured before and after negative bias illumination stress. Experimental results show few variations of the oxide trapped charges are generated during stress, which is consistent with the proposed mechanism.

Temperature Dependence of Electrical Characteristics in Indium-Zinc-Oxide Thin Film Transistors from 10 K to 400 K

The transfer characteristics of amorphous indium-zinc-oxide thin film transistors are measured in the temperature range of 10-400K. The variation of electrical parameters （threshold voltage, field effect mobility, sub-threshold swing, and leafage current） with decreasing temperature are then extracted and analyzed. Moreover, the dom- inated carrier transport mechanisms at different temperature regions are investigated. The experimental data show that the carrier transport mechanism may change from trap-limited conduction to variable range hopping conduction at lower temperature. Moreover, the field effect mobilities are also extracted and simulated at various temperatures.

Experimental and simulation studies of single-event transient in partially depleted SOI MOSFET

In this study, we investigate the single-event transient（SET） characteristics of a partially depleted silicon-on-insulator（PDSOI） metal-oxide-semiconductor（MOS） device induced by a pulsed laser.We measure and analyze the drain transient current at the wafer level. The results indicate that the body-drain junction and its vicinity are more SET sensitive than the other regions in PD-SOI devices.We use ISE 3D simulation tools to analyze the SET response when different regions of the device are hit. Then, we discuss in detail the characteristics of transient currents and the electrostatic potential distribution change in devices after irradiation. Finally, we analyze the parasitic bipolar junction transistor（p-BJT） effect by performing both a laser test and simulations.

Direct measurement and analysis of total ionizing dose effect on 130 nm PD SOI SRAM cell static noise margin

In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin（SNM） is specifically designed and irradiated by gamma-ray. Both data sides＇ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side＇s SNM is decreased and the other data side＇s SNM is increased. Moreover, measurement of SNM under different supply voltages（Vdd） reveals that SNM is more sensitive to TID under lower Vdd. The impact of TID on SNM under data retention Vddshould be tested, because Vddof SRAM cell under data retention mode is lower than normal Vdd.The mechanism under the above results is analyzed by measurement of I–V characteristics of SRAM cell transistors.

Superjunction nanoscale partially narrow mesa IGBT towards superior performance

We present a detailed study of a superjunction （S J） nanoscale partially narrow mesa （PNM） insulated gate bipolar transistor （IGBT） structure. This structure is created by combining the nanoscale PNM structure and the SJ structure together. It demonstrates an ultra-low saturation voltage （Vce（sat）） and low turn-off loss （Eoff） while maintaining other device parameters. Compared with the conventional 1.2 kV trench IGBT, our simulation result shows that the gce（sat） of this structure decreases to 0.94 V, which is close to the theoretical limit of 1.2 kV IGBT, Meanwhile, the fall time decreases from 109.7 ns to 12 ns and the Eoff is down to only 37% of that of the conventional structure. The superior tradeoff characteristic between Vce（sat） and Eoff is presented owing to the nanometer level mesa width and SJ structure. Moreover, the short circuit degeneration phenomenon in the very narrow mesa structure due to the collector-induced barriers lowering （CIBL） effect is not observed in this structure. Thus, enough short circuit ability can be achieved by using wide, floating P-well technique. Based on these structure advantages, the SJ-PNM-IGBT with nanoscale mesa width indicates a potentially superior overall performance towards the IGBT parameter limit.

Single-event burnout hardening of planar power MOSFET with partially widened trench source

We present a single-event burnout（SEB） hardened planar power MOSFET with partially widened trench sources by three-dimensional（3 D） numerical simulation. The advantage of the proposed structure is that the work of the parasitic bipolar transistor inherited in the power MOSFET is suppressed effectively due to the elimination of the most sensitive region（P-well region below the N＋ source）. The simulation result shows that the proposed structure can enhance the SEB survivability significantly. The critical value of linear energy transfer（LET）,which indicates the maximum deposited energy on the device without SEB behavior, increases from 0.06 to0.7 p C/μm. The SEB threshold voltage increases to 120 V, which is 80% of the rated breakdown voltage. Meanwhile, the main parameter characteristics of the proposed structure remain similar with those of the conventional planar structure. Therefore, this structure offers a potential optimization path to planar power MOSFET with high SEB survivability for space and atmospheric applications.

经氮氟复合注入的绝缘体上硅材料埋氧层的总剂量辐射响应（英文）

为提高绝缘体上硅材料(SOI)中的埋氧层(BOX)的抗总剂量辐射能力,采用离子注入方式,使用氮氟复合注入,对材料的BOX进行了离子注入改性.以改性的BOX制作多晶硅栅-BOX-半导体衬底(PBS)电容结构,采用Co-60γ射线,在0.7至1.7 Mrad(Si)剂量范围内,对PBS样品进行了辐照,并使用电容-电压(C-V)技术对样品的辐射效应进行了表征.实验发现,在恰当的工艺条件下,针对BOX的氮氟复合注入,可明显改善BOX的抗辐射能力,且BOX的辐射响应与注氮后的退火时间直接相关.同时,实验观察到随辐照剂量的增加,BOX的辐射响应出现了回弹及振荡现象.并依据实验结果,对其产生机制进行了分析讨论.