Effects of gate-buffer combined with a p-type spacer structure on silicon carbide metal semiconductor field-effect transistors

An improved structure of silicon carbide metal-semiconductor field-effect transistors （MESFET） is proposed for high power microwave applications. Numerical models for the physical and electrical mechanisms of the device are presented, and the static and dynamic electrical performances are analysed. By comparison with the conventional structure, the proposed structure exhibits a superior frequency response while possessing better DC characteristics. A p-type spacer layer, inserted between the oxide and the channel, is shown to suppress the surface trap effect and improve the distribution of the electric field at the gate edge. Meanwhile, a lightly doped n-type buffer layer under the gate reduces depletion in the channel, resulting in an increase in the output current and a reduction in the gate-capacitance. The structural parameter dependences of the device performance are discussed, and an optimized design is obtained. The results show that the maximum saturation current density of 325 mA/mm is yielded, compared with 182 mA/mm for conventional MESFETs under the condition that the breakdown voltage of the proposed MESFET is larger than that of the conventional MESFET, leading to an increase of 79% in the output power density. In addition, improvements of 27% cut-off frequency and 28% maximum oscillation frequency are achieved compared with a conventional MESFET, respectively.

Investigation of current transport parameters of Ti/4H-SiC MPS diode with inhomogeneous barrier

The current transport parameters of 4H-SiC merged PiN Schottky （MPS） diode are investigated in a temperature range of 300-520 K. Evaluation of the experimental current-voltage （I-V） data reveals the decrease in Schottky barrier height Φb but an increase in ideality factor n, with temperature decreasing, which suggests the presence of an inhomogeneous Schottky barrier. The current transport behaviours are analysed in detail using the Tung＇s model and the effective area of the low barrier patches is extracted. It is found that small low barrier patches, making only 4.3% of the total contact, may significantly influence the device electrical characteristics due to the fact that a barrier height of 0.968 eV is much lower than the average barrier height 1.39 eV. This shows that ion implantation in the Schottky contact region of MPS structure may result in a poor Ti/4H-SiC interface quality. In addition, the temperature dependence of the specific on-resistance （Ron-sp）, T^2.14, is determined between 300 K and 520 K, which is similar to that predicted by a reduction in electron mobility.

Effect of substrate doping on threshold voltages of buried channel pMOSFET based on strained-SiGe technology

The effect of substrate doping on the threshold voltages of buried channel pMOSFET based on strained-SiGe technology was studied.By physically deriving the models of the threshold voltages,it is found that the layer which inversely occurs first is substrate doping dependent,giving explanation for the variation of plateau observed in the C-V characteristics of this device,as the doping concentration increases.The threshold voltages obtained from the proposed model are-1.2805 V for buried channel and-2.9358 V for surface channel at a lightly doping case,and-3.41 V for surface channel at a heavily doping case,which agrees well with the experimental results.Also,the variations of the threshold voltages with several device parameters are discussed,which provides valuable reference to the designers of strained-SiGe devices.

Sinusoidal Steady State Analysis on 4H-SiC Buried Channel MOSFETs

With the combined use of the drift-diffusion （DD） model, experiment measured parameters and small-signal sinusoidM steady-state analysis, we extract the Y-parameters for 4H-SiC buried-channel metal oxide semicon- ductor field effect transistors （BCMOSFETs）. Output short-circuit current gain G and Mason＇s invariant U are cMculated for extrapolating unity current gain frequency in the common-source configuration fT and the maximum frequency of oscillation fmax, respectively. Here fT = 800 MHz and fmax= 5 GHz are extracted for the 4H-SiC BCMOSFETs, while the field effect mobility reaches its peak value 87cm2/Vs when VGs = 4.5 V. Simulation results clearly show that the characteristic frequency of 4H-SiC BCMOSFETs and field effect mobility are superior, due to the novel structure, compared with conventional MOSFETs.

Negative differential resistance in single-walled SiC nanotubes

A two-probe system was established for a finite (7, 0) silicon carbide (SiC) nanotube coupled to Au (111) surfaces via Au-C bonds. Using the non-equilibrium Green function (NEGF) combined with density functional theory (DFT), the above system was studied for its electronic transport properties. Negative differential resistance (NDR) was observed when the bias voltage was greater than 1.4 V. Because the transport properties of the system were sensitive to the applied bias voltage, NDR might be caused by the fluctuation of the transmission coefficient with the bias voltage.

C-band 6-bit phase shifter for a phase array antenna

A C-band 6-bit digital phase shifter is presented. The phase shifter is based on the synthetic design of a high-pass/low-pass network and the all-pass network. The series scatter restrain method is also discussed. The phase shifter is fabricated in 0.25/zm GaAs PHEMT technology and developed for C-band phased arrays, and the relative phase shift varies from 0 to 360 in step of 5.625°. The phase shifter, with a chip size of 4 × 1.95 mm2, has achieved an insertion loss better than 6.4 dB, RMS phase error of less than 1.73°, and an input and output VSWR less than 1.6 at all conditions.

Small-signal switch model of GaN HEMTs for MMIC applications

Gallium nitride （GaN） high electron mobility transistor （HEMT） with symmetrical structure as a control device is discussed in this paper. The equivalent circuit model is proposed on the basis of physical and electrical properties of the GaN HEMT device. A transistor with 0.5 μm gate length and 6 x 125 gm gate width is fabricated to verify the model, which can be treated as a single pole single throw （SPST） switch due to the ON state and OFF state. The measurement results show a lzood agreement with the simulation results, which demonstrates the effectiveness of the proposed model.