In this paper, the dynamic observer-based controller design for a class of neutral systems with H∞ control is considered. An observer-based output feedback is derived for systems with polytopic parameter uncertaintie...In this paper, the dynamic observer-based controller design for a class of neutral systems with H∞ control is considered. An observer-based output feedback is derived for systems with polytopic parameter uncertainties. This controller assures delay-dependent stabilization and H∞ norm bound attenuation from the disturbance input to the controlled output. Numerical examples are provided for illustration and comparison of the proposed conditions.展开更多
This paper considers the problem of delay-dependent robust stability for uncertain singular systems with additive time-varying delays. The purpose of the robust stability problem is to give conditions such that the un...This paper considers the problem of delay-dependent robust stability for uncertain singular systems with additive time-varying delays. The purpose of the robust stability problem is to give conditions such that the uncertain singular system is regular, impulse free, and stable for all admissible uncertainties. The results are expressed in terms of linear matrix inequalities （LMIs）. Finally, two numerical examples are provided to illustrate the effectiveness of the proposed method.展开更多
This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doubl...This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doublers the output voltage increases up to 2 times. A two-phase voltage doubler and a multiphase voltage doubler structures are discussed and design considerations are presented. A simulator working in the Q-V realm was used for simplified circuit level simulation. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. To avoid the short circuit during switching, a clock pair generator is used to achieve multi-phase non-overlapping clock pairs. This paper also identifies optimum loading conditions for different configurations of the charge pumps. The proposed charge-pump circuit is designed and simulated by SPICE with TSMC 0.35-μm CMOS technology and operates with a 2.7 to 3.6 V supply voltage. It has an area of 0.4 mm^2; it was designed with a frequency regulation of 1 MHz and internal current mode to reduce power consumption.展开更多
文摘In this paper, the dynamic observer-based controller design for a class of neutral systems with H∞ control is considered. An observer-based output feedback is derived for systems with polytopic parameter uncertainties. This controller assures delay-dependent stabilization and H∞ norm bound attenuation from the disturbance input to the controlled output. Numerical examples are provided for illustration and comparison of the proposed conditions.
文摘This paper considers the problem of delay-dependent robust stability for uncertain singular systems with additive time-varying delays. The purpose of the robust stability problem is to give conditions such that the uncertain singular system is regular, impulse free, and stable for all admissible uncertainties. The results are expressed in terms of linear matrix inequalities （LMIs）. Finally, two numerical examples are provided to illustrate the effectiveness of the proposed method.
文摘This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doublers the output voltage increases up to 2 times. A two-phase voltage doubler and a multiphase voltage doubler structures are discussed and design considerations are presented. A simulator working in the Q-V realm was used for simplified circuit level simulation. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. To avoid the short circuit during switching, a clock pair generator is used to achieve multi-phase non-overlapping clock pairs. This paper also identifies optimum loading conditions for different configurations of the charge pumps. The proposed charge-pump circuit is designed and simulated by SPICE with TSMC 0.35-μm CMOS technology and operates with a 2.7 to 3.6 V supply voltage. It has an area of 0.4 mm^2; it was designed with a frequency regulation of 1 MHz and internal current mode to reduce power consumption.
