Design and fabrication of crack-junctions

Nanogap electrodes consist of pairs of electrically conducting tips that exhibit nanoscale gaps.They are building blocks for a variety of applications in quantum electronics,nanophotonics,plasmonics,nanopore sequencing,molecular electronics,and molecular sensing.Crack-junctions(CJs)constitute a new class of nanogap electrodes that are formed by controlled fracture of suspended bridge structures fabricated in an electrically conducting thin film under residual tensile stress.Key advantages of the CJ methodology over alternative technologies are that CJs can be fabricated with wafer-scale processes,and that the width of each individual nanogap can be precisely controlled in a range from o2 to 4100 nm.While the realization of CJs has been demonstrated in initial experiments,the impact of the different design parameters on the resulting CJs has not yet been studied.Here we investigate the influence of design parameters such as the dimensions and shape of the notches,the length of the electrode-bridge and the design of the anchors,on the formation and propagation of cracks and on the resulting features of the CJs.We verify that the design criteria yields accurate prediction of crack formation in electrode-bridges featuring a beam width of 280 nm and beam lengths ranging from 1 to 1.8μm.We further present design as well as experimental guidelines for the fabrication of CJs and propose an approach to initiate crack formation after release etching of the suspended electrode-bridge,thereby enabling the realization of CJs with pristine electrode surfaces.

Inkjet printing technology for increasing the I/O density of 3D TSV interposers

Interposers with through-silicon vias(TSVs)play a key role in the three-dimensional integration and packaging of integrated circuits and microelectromechanical systems.In the current practice of fabricating interposers,solder balls are placed next to the vias;however,this approach requires a large foot print for the input/output(I/O)connections.Therefore,in this study,we investigate the possibility of placing the solder balls directly on top of the vias,thereby enabling a smaller pitch between the solder balls and an increased density of the I/O connections.To reach this goal,inkjet printing(that is,piezo and super inkjet)was used to successfully fill and planarize hollow metal TSVs with a dielectric polymer.The under bump metallization(UBM)pads were also successfully printed with inkjet technology on top of the polymer-filled vias,using either Ag or Au inks.The reliability of the TSV interposers was investigated by a temperature cycling stress test(−40℃ to+125℃).The stress test showed no impact on DC resistance of the TSVs;however,shrinkage and delamination of the polymer was observed,along with some micro-cracks in the UBM pads.For proof of concept,SnAgCu-based solder balls were jetted on the UBM pads.