Photoluminescence characteristics of GaN：Si

Both the electrical and optical properties are studied of the GaN：Si films with carrier concentrations ranging from 10^17cm^-3 to 10^19cm^-3.rhe results indicate that the increase in slope of carrier concentration starts to slow down when the flow rate of SiH4 is larger than 6.38μmol/min, which is attributed to the amphoteric character of Si. At the same time, the photoluminescence results show that the FWHM of UV is widened,which can be interpreted quantitatively with a semi-classic model. Furthermore, the intensity ratio between the yellow and the UV luminescences reduces monotonically with Si dopants increasing.

A glance of technology efforts for design-for-manufacturing in nano-scale CMOS processes

This paper overviews design for manufacturing （DFM） for IC design in nano-CMOS technologies. Process/device issues relevant to the manufacturability of ICs in advanced CMOS technologies will be presented first before an exploration on process/device modeling for DFM is done. The discussion also covers a brief introduction of DFM-aware of design flow and EDA efforts to better handle the design-manufacturing interface in very large scale IC design environment.

Advances in lithium niobate photonics:development status and perspectives

Lithium niobate(LN)has experienced significant developments during past decades due to its versatile properties,especially its large electro-optic(EO)coefficient.For example,bulk LN-based modulators with high speeds and a superior linearity are widely used in typical fiber-optic communication systems.However,with everincreasing demands for signal transmission capacity,the high power and large size of bulk LN-based devices pose great challenges,especially when one of its counterparts,integrated silicon photonics,has experienced dramatic developments in recent decades.Not long ago,high-quality thin-film LN on insulator(LNOI)became commercially available,which has paved the way for integrated LN photonics and opened a hot research area of LN photonics devices.LNOI allows a large refractive index contrast,thus light can be confined within a more compact structure.Together with other properties of LN,such as nonlinear/acousto-optic/pyroelectric effects,various kinds of high-performance integrated LN devices can be demonstrated.A comprehensive summary of advances in LN photonics is provided.As LN photonics has experienced several decades of development,our review includes some of the typical bulk LN devices as well as recently developed thin film LN devices.In this way,readers may be inspired by a complete picture of the evolution of this technology.We first introduce the basic material properties of LN and several key processing technologies for fabricating photonics devices.After that,various kinds of functional devices based on different effects are summarized.Finally,we give a short summary and perspective of LN photonics.We hope this review can give readers more insight into recent advances in LN photonics and contribute to the further development of LN related research.

An area-efficient 55 nm 10-bit 1-MS/s SAR ADC for battery voltage measurement

An area-efficient CMOS 1-MS/s 10-bit charge-redistribution SAR ADC for battery voltage measure- ment in a SoC chip is proposed. A new DAC architecture presents the benefits of a low power approach without applying the common mode voltage. The threshold inverter quantizer （TIQ）-based CMOS Inverter is used as a comparator in the ADC to avoid static power consumption which is attractive in battery-supply application. Sixteen level-up shifters aim at converting the ultra low core voltage control signals to the higher voltage level analog circuit in a 55 nm CMOS process. The whole ADC power consumption is 2.5 mW with a maximum input capaci- tance of 12 pF in the sampling mode. The active area of the proposed ADC is 0.0462 mm2 and it achieves the SFDR and ENOB of 65.6917 dB and 9.8726 bits respectively with an input frequency of 200 kHz at 1 MS/s sampling rate.

A novel switched capacitor bandgap reference with a correlated double sampling structure

A switched capacitor bandgap voltage reference with correlated double sampling structure embedded in a temperature sensor is implemented in a standard 0.35 um CMOS process. Due to the smaller change of the op-amp＇s output voltage, this topology is very suitable for low power applications. In addition, errors caused by the finite op-amp gain, input offset voltage, and 1/f noise are eliminated with the correlated double sampling technique. Additionally, two-level process calibration techniques are designed to minimize the process spread. Finally, a method of getting a full period valid reference voltage output is discussed and experimental results are provided to verify the effectiveness of the proposed structure.