Three-Dimensional Simulation of Plasma Deformation During Contact Opening in a Circuit Breaker,Including the Analysis of Kink Instability and Sausage Instability

A three-dimensional （3-D） transient model has been developed to investigate plasma deformation driven by a magnetic field and its influence on arc stability in a circuit breaker. The 3-D distribution of electric current density is obtained from a current continuity equation along with the generalized Ohm＇s law; while the magnetic field induced by the current flowing through the arc column is calculated by the magnetic vector potential equation. When gas interacts with an arc column, fundamental factors, such as Ampere＇s law, Ohm＇s law, the turbulence model, transport equations of mass, momentum and energy of plasma flow, have to be coupled for aria- lyzing the phenomenon. The coupled interactions between arc and plasma flow are described in the fl＇amework of time-dependent magnetohydrodynamic （MHD） equations in conjunction with a K-~ turbulence model. Simulations have been focused on sausage and kink instabilities in plasma （these phenomena are related tO pinch effects and electromagnetic fields）. The 3-D sjm- ulation reveals the relation between plasma deformation and instability phenomena, which affect arc stability during circuit breaker operation. Plasma deformation is the consequence of coupled interactions between the electromagnetic force and plasma flow described in simulations.

Tight-binding study of quantum transport in nanoscale GaAs Schottky MOSFET

This paper explores the band structure effect to elucidate the feasibility of an ultra-scaled GaAs Schottky MOSFET （SBFET） in a nanoscale regime. We have employed a 20-band sp3dSs＊ tight-binding （TB） approach to compute E - K dis- persion. The considerable difference between the extracted effective masses from the TB approach and bulk values implies that quantum confinement affects the device performance. Beside high injection velocity, the ultra-scaled GaAs SBFET suffers from a low conduction band DOS in the F valley that results in serious degradation of the gate capacitance. Quan- tum confinement also results in an increment of the effective Schottky barrier height （SBH）. Enhanced Schottky barriers form a double barrier potential well along the channel that leads to resonant tunneling and alters the normal operation of the SBFET. Major factors that may lead to resonant tunneling are investigated. Resonant tunneling occurs at low temperatures and low drain voltages, and gradually diminishes as the channel thickness and the gate length scale down. Accordingly, the GaAs （100） SBFET has poor ballistic performance in nanoscale regime.

A 0.9 V Supply OTA in 0.18 μm CMOS Technology and Its Application in Realizing a Tunable Low-Pass Gm-C Filter for Wireless Sensor Networks

A low voltage low power operational transconductance amplifier (OTA) based on a bulk driven cell and its application to implement a tunable Gm-C filter is presented. The linearity of the OTA is improved by attenuation and source degeneration techniques. The attenuation technique is implemented by bulk driven cell which is used for low supply voltage circuits. The OTA is designed to operate with a 0.9 V supply voltage and consumes 58.8 μW power. A 600 mVppd sine wave input signal at 1 MHz frequency shows total harmonic distortion (THD) better than -40 dB over the tuning range of the transconductance. The OTA has been used to realize a tunable Gm-C low-pass filter with gain tuning from 5 dB to 21 dB with 4 dB gain steps, which results in power consumptions of 411.6 to 646.8 μW. This low voltage filter can operate as channel select filter and variable gain amplifier (VGA) for wireless sensor network (WSN) applications. The proposed OTA and filter have been simulated in 0.18 μm CMOS technology. Corner case and temperature simulation results are also included to forecast process and temperature variation affects after fabrication.

A new hybrid control technique for operation of DC microgrid under islanded operating mode

This study proposes a novel combined primary and secondary control approach for direct current microgrids,specifi-cally in islanded mode.In primary control,this approach establishes an appropriate load power sharing between the distributed energy resources based on their rated power.Simultaneously,it considers the load voltage deviation and provides satisfactory voltage regulation in the secondary control loop.The proposed primary control is based on an efficient droop mechanism that only deploys the local variable measurements,so as to overcome the side effects caused by communication delays.In the case of secondary control,two different methods are devised.In the first,low bandwidth communication links are used to establish the minimum required data transfer between the converters.The effect of communication delay is further explored.The second method excludes any communication link and only uses local variables.Accordingly,a self-sufficient control loop is devised without any communication require-ment.The proposed control notions are investigated in MATLAB/Simulink platform to highlight system performance.The results demonstrate that both proposed approaches can effectively compensate for the voltage deviation due to the primary control task.Detailed comparisons of the two methods are also provided.

High-performance low-leakage regions of nano-scaled CMOS digital gates under variations of threshold voltage and mobility

We propose a modeling methodology for both leakage power consumption and delay of basic CMOS digital gates in the presence of threshold voltage and mobility variations. The key parameters in determining the leakage and delay are OFF and ON currents, respectively, which are both affected by the variation of the threshold voltage. Additionally, the current is a strong function of mobility. The proposed methodology relies on a proper modeling of the threshold voltage and mobility variations, which may be induced by any source. Using this model, in the plane of threshold voltage and mobility, we determine regions for different combinations of performance (speed) and leakage. Based on these regions, we discuss the trade-off between leakage and delay where the leakage-delay-product is the optimization objective. To assess the accuracy of the proposed model, we compare its predictions with those of HSPICE simulations for both basic digital gates and ISCAS85 benchmark circuits in 45-, 65-, and 90-nm technologies.

A low-power high-throughput link splitting router for NoCs

In this paper, we propose a technique for lowering the latency of the communication in a NoC (network on chip). The technique, which can support two qualities of service (QoS), i.e., the guaranteed throughput (GT) and best effort (BE), is based on splitting a wider link into narrower links to increase throughput and decrease latency in the NoC. In addition, to ease the syn-chronization and reduce the crosstalk, we use the 1-of-4 encoding for the smaller buses. The use of the encoding in the proposed NoC architecture considerably lowers the latency for both BE and GT packets. In addition, the bandwidth is increased while the power consumption of the links is reduced.

两种直接波浪能转换系统性能的比较:阿基米德波浪摆和波能浮筒(英文)

Many wave energy conversion devices have not been well received. The main reasons are that they are too complicated and not economical. However, in the last two decades direct conversion systems have drawn the attention of researchers to their widely distributed energy source due to their simple structure and low cost. The most well-known direct conversion systems presently in use include the Archimedes Wave Swing (AWS) and Power Buoy (PB). In this paper, these two systems were simulated in the same conditions and their behaviors were studied in different wave conditions. In order to verify the simulations, results of the generator of the finite element computations were followed. An attempt was made to determine the merits and drawbacks of each method under different wave conditions by comparing the performance of the two systems. The wave conditions suitable for each system were specified.

Simulation of space charge transport in solid dielectric materials using transmission lines modeling method

In this paper,a lumped RC circuit model,which is based on the Transmission Line Modeling(TLM)method,is used to describe the space charge production and displacement mechanisms in three different solid dielectric materials(LDPE,PTFE and FR4).Each dielectric material is considered as a transmission line with the capacitive and resistance elements.The obtained circuit equations are solved along with the continuity equations for the various charged species in the bulk of solid dielectric material.The electric potential and field,density of different charged species and their recombination rates,resistive and capacitive properties of the solid dielectric material are calculated.In addition,the effects of the variations in the applied voltage,dielectric permittivity and temperature on these physical parameters are examined.Besides,compared with LDPE and PTFE,the net charge density increment rate in FR4 is much higher.Moreover,the influences of temperature on the net charge density in LDPE are not significant.Furthermore,at the higher applied voltages,the current density is increased.Interestingly,the effects of temperature variations on the recombination rates,net charge and current density in LDPE are much lower.Hence,the suitability of LDPE as solid dielectric material is proved.

A Low Phase Noise Ring-VCO Based PLL Using Injection Locking for ZigBee Applications

A low power low phase noise frequency synthesizer with subharmonic injection locking is proposed for ZigBee applications. The PLL is based on a ring VCO to decrease area and production cost. In order to improve phase noise performance, a high frequency injection signal of which frequency varies with channel number is used. The circuit is designed in TSMC 0.18 μm CMOS technology and simulated in ADS (Advanced Design System). The phase noise at 3.5 and 10 MHz offsets is -116 and -118 dBc/Hz, respectively, and total circuit consumes 2.2 mA current.

A low-power and low-energy flexible GF(p) elliptic-curve cryptography processor

We investigate the use of two integer inversion algorithms,a modified Montgomery modulo inverse and a Fermat's Little Theorem based inversion,in a prime-field affine-coordinate elliptic-curve crypto-processor.To perform this,we present a low-power/energy GF(p) affine-coordinate elliptic-curve cryptography(ECC) processor design with a simplified architecture and complete flexibility in terms of the field and curve parameters.The design can use either of the inversion algorithms.Based on the implementations of this design for 168-,192-,and 224-bit prime fields using a standard 0.13 μm CMOS technology,we compare the efficiency of the algorithms in terms of power/energy consumption,area,and calculation time.The results show that while the Fermat's theorem approach is not appropriate for the affine-coordinate ECC processors due to its long computation time,the Montgomery modulo inverse algorithm is a good candidate for low-energy implementations.The results also show that the 168-bit ECC processor based on the Montgomery modulo inverse completes one scalar multiplication in only 0.4 s at a 1 MHz clock frequency consuming only 12.92 μJ,which is lower than the reported values for similar designs.

An accurate analytical I-V model for sub-90-nm MOSFETs and its application to read static noise margin modeling

We propose an accurate model to describe the I-V characteristics of a sub-90-nm metal-oxide-semiconductor field-effect transistor(MOSFET) in the linear and saturation regions for fast analytical calculation of the current.The model is based on the BSIM3v3 model.Instead of using constant threshold voltage and early voltage,as is assumed in the BSIM3v3 model,we define these voltages as functions of the gate-source voltage.The accuracy of the model is verified by comparison with HSPICE for the 90-,65-,45-,and 32-nm CMOS technologies.The model shows better accuracy than the nth-power and BSIM3v3 models.Then,we use the proposed I-V model to calculate the read static noise margin(SNM) of nano-scale conventional 6T static random-access memory(SRAM) cells with high accuracy.We calculate the read SNM by approximating the inverter transfer voltage characteristic of the cell in the regions where vertices of the maximum square of the butterfly curves are placed.The results for the SNM are also in excellent agreement with those of the HSPICE simulation for 90-,65-,45-,and 32-nm technologies.Verification in the presence of process variations and negative bias temperature instability(NBTI) shows that the model can accurately predict the minimum supply voltage required for a target yield.

Folic Acid Functionalized Vertically Aligned Carbon Nanotube (FA-VACNT) Electrodes for Cancer Sensing Applications

An electrical cancer biosensor was developed using amine-functionalized vertically aligned carbon nanotubes （VACNTs） conjugated to folic acid （FA） molecules. Specific binding of FA to folate receptor （FR） existing on the membrane of cancer cells assisted their entrapment on VACNTs. For the conjugation of FA to CNTs, amine （--NH2） functional groups were attached to the side walls of the nanotubes by plasma treatment. The amount and shape of entrapped cancer cells on FA-VACNTs were noticeably higher and more uniform than the cells entrapped on bare VACNTs. The comparative signal spike of the FA-VACNTs and VACNTs covered impedance sensor in interaction with the same concentration of lung cancer cells （QUDB） showed sharper response for the functionalized sensor. Moreover, electron microscopy and florescent images as well as impedance diagrams verified the spherical and non-deformed shape of the cells entrapped by FA-VACNT, This sensor would be useful in assaying the cells vitality in time evolution. This device could be applied in diagnostic and time monitoring applications in the field of cancer such as extreme drug resistance assay （EDR）.

Low-cost fault tolerance in evolvable multiprocessor systems:a graceful degradation approach

The evolvable multiprocessor (EvoMP), as a novel multiprocessor system-on-chip (MPSoC) machine with evolvable task decomposition and scheduling, claims a major feature of low-cost and efficient fault tolerance. Non-centralized control and adaptive distribution of the program among the available processors are two major capabilities of this platform, which remarkably help to achieve an efficient fault tolerance scheme. This letter presents the operational as well as architectural details of this fault tolerance scheme. In this method, when a processor becomes faulty, it will be eliminated of contribution in program execution in remaining run-time. This method also utilizes dynamic rescheduling capability of the system to achieve the maximum possible efficiency after processor reduction. The results confirm the efficiency and remarkable advantages of the proposed approach over common redundancy based techniques in similar systems.

电力系统中对称和/或不对称故障的限流器阻抗优化新方法（英文）

为给电力网络设计者选择故障限流器(fault current limiters,FCLs)的阻抗类型和阻值,提出一种基于其在网络中的位置计算最佳FCL阻值的新方法。由于阻抗的复杂性,需同时考虑FCL阻抗实部和虚部的代价。FCL阻抗优化的目标函数,是以最小化代价最大限度减少故障电流。虽然最佳FCL阻抗值的计算受其在网络中位置的影响,但选取FCL位置的方法并非本文重点。该FCL阻抗优化方法可用于任何具有对称和/或不对称故障的网络。以一个14总线IEEE网络为例解释该过程。该网络采用的最优FCL阻抗是同时考虑FCL阻抗实部和虚部的大范围代价计算得到的。

Line-start permanent magnet synchronous motors versus induction motors： A comparative study

Line-start permanent magnet synchronous motors are suitable candidates for substitution of induction motors in many constant-speed applications. This paper compares steady-state and dynamic performances of these motors. The efficiency, power factor, stator currents, and rotor bars currents are considered for steady-state perfor- mance analysis whereas the rotor speed, electromagnetic torque, and stator and rotor currents are investigated for dynamic performance analysis. For this purpose, time stepping finite element method is used to analyze the performance of motors in both full-load and no-load conditions. Results demonstrate the superior performance of the line-start permanent magnet synchronous motor in steady-state condition and the improved dynamic perfor-mance of the induction motor. Finally, economic calcula- tions indicate that the extra cost of the line-start permanent magnet synchronous motor with respect to the induction motor is rapidly compensated by energy saving due to a more efficient operation.