Derived from a proposed universal mathematical expression, this paper investigates a novel algo-rithm for parallel Cyclic Redundancy Check (CRC) computation, which is an iterative algorithm to update the check-bit seq...Derived from a proposed universal mathematical expression, this paper investigates a novel algo-rithm for parallel Cyclic Redundancy Check (CRC) computation, which is an iterative algorithm to update the check-bit sequence step by step and suits to various argument selections of CRC computation. The algorithm proposed is quite suitable for hardware implementation. The simulation implementation and performance analysis suggest that it could efficiently speed up the computation compared with the conventional ones. The algorithm is implemented in hardware at as high as 21Gbps, and its usefulness in high-speed CRC computa-tions is implied, such as Asynchronous Transfer Mode (ATM) networks and 10G Ethernet.展开更多
Due to the lack of a unified authentication model certain mistakes occurred in the use of the wa-termarking authentication methods. To clarify the confusion, authentication models of robust and fragile wa-termarking a...Due to the lack of a unified authentication model certain mistakes occurred in the use of the wa-termarking authentication methods. To clarify the confusion, authentication models of robust and fragile wa-termarking are developed respectively in the paper. Concrete algorithms are proposed to prove the models that different Discrete Wavelet Transform (DWT) domains are utilized to embed the watermarks and quanti-zation method is presented with Just Notice Differences (JNDs) threshold as the quantization size. After the key technologies about the two methods are discussed, we detail the comparison of the two modes and rec-ommend their respective application scenarios as applicable results.展开更多
基金Supported by the National Natural Science Foundation of China (No.60172029) and the Natural Science Foun-dation of Shaanxi Province (No.2004F04).
文摘Derived from a proposed universal mathematical expression, this paper investigates a novel algo-rithm for parallel Cyclic Redundancy Check (CRC) computation, which is an iterative algorithm to update the check-bit sequence step by step and suits to various argument selections of CRC computation. The algorithm proposed is quite suitable for hardware implementation. The simulation implementation and performance analysis suggest that it could efficiently speed up the computation compared with the conventional ones. The algorithm is implemented in hardware at as high as 21Gbps, and its usefulness in high-speed CRC computa-tions is implied, such as Asynchronous Transfer Mode (ATM) networks and 10G Ethernet.
文摘Due to the lack of a unified authentication model certain mistakes occurred in the use of the wa-termarking authentication methods. To clarify the confusion, authentication models of robust and fragile wa-termarking are developed respectively in the paper. Concrete algorithms are proposed to prove the models that different Discrete Wavelet Transform (DWT) domains are utilized to embed the watermarks and quanti-zation method is presented with Just Notice Differences (JNDs) threshold as the quantization size. After the key technologies about the two methods are discussed, we detail the comparison of the two modes and rec-ommend their respective application scenarios as applicable results.
