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Robustness aware high performance high fan-in domino OR logic design
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作者 宫娜 汪金辉 +3 位作者 郭宝增 王永清 曹晓兵 田秀丽 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2009年第6期107-110,共4页
A novel technique using a keeper with a simultaneous low supply voltage and low body voltage is proposed to improve the overall performance of high fan-in OR gates without modifying the physical dimensions of the keep... A novel technique using a keeper with a simultaneous low supply voltage and low body voltage is proposed to improve the overall performance of high fan-in OR gates without modifying the physical dimensions of the keeper.Simulation results of a 16-input domino OR gate using 45 nm CMOS technology show that the proposed technique could trade off between a high power/speed efficient operation and the robustness to noise effectively.Also,a Monte Carlo analysis indicates that the proposed domino OR gate is more robust to parameter variation compared to a conventional domino OR gate. 展开更多
关键词 Domino OR ROBUSTNESS power consumption parameter variation
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