A low noise multi-channel readout integrated circuit （IC） which converts a detector current to analog voltage for X-ray cargo inspection is described. The readout IC provides 32 channels of a circuit having a maxi- ...A low noise multi-channel readout integrated circuit （IC） which converts a detector current to analog voltage for X-ray cargo inspection is described. The readout IC provides 32 channels of a circuit having a maxi- mum dynamic range of 15 bit and is comprised of integrator gain selection, timing generator, shift register chain, integrator array, sample/hold （S/H） stage amplifier etc. and occupies a die area of 2.7 × 13.9 mm2. It operates at It was fabricated using 0.6 μm standard CMOS process, 1 MHz, consumes 100 mW from a 5 V supply and 4.096 V as reference, and has a measured output noise of 85 μVms on 63 pF of integrator gain capacitance and 440 pF of photodiode terminal capacitance so that steel plate penetration thickness can reach more than 400 mm.展开更多
Using the multiple-parameter Monte Carlo method, the effectiveness of the dual threshold voltage technique （DTV） in low power domino logic design is analyzed. Simulation results indicate that under significant tempe...Using the multiple-parameter Monte Carlo method, the effectiveness of the dual threshold voltage technique （DTV） in low power domino logic design is analyzed. Simulation results indicate that under significant temperature and process fluctuations, DTV is still highly effective in reducing the total leakage and active power consumption for domino gates with speed loss. Also, regarding power and delay characteristics, different structure domino gates with DTV have different robustness against temperature and process fluctuation.展开更多
基金Project supported by the Beijing DT Electronic Technology Co.,Ltd.the National Natural Science Foundation of China(No.60976028)
文摘A low noise multi-channel readout integrated circuit （IC） which converts a detector current to analog voltage for X-ray cargo inspection is described. The readout IC provides 32 channels of a circuit having a maxi- mum dynamic range of 15 bit and is comprised of integrator gain selection, timing generator, shift register chain, integrator array, sample/hold （S/H） stage amplifier etc. and occupies a die area of 2.7 × 13.9 mm2. It operates at It was fabricated using 0.6 μm standard CMOS process, 1 MHz, consumes 100 mW from a 5 V supply and 4.096 V as reference, and has a measured output noise of 85 μVms on 63 pF of integrator gain capacitance and 440 pF of photodiode terminal capacitance so that steel plate penetration thickness can reach more than 400 mm.
基金supported by the PhD Student Innovation Program of Beijing University of Technology(No.bcx-2009-015)
文摘Using the multiple-parameter Monte Carlo method, the effectiveness of the dual threshold voltage technique （DTV） in low power domino logic design is analyzed. Simulation results indicate that under significant temperature and process fluctuations, DTV is still highly effective in reducing the total leakage and active power consumption for domino gates with speed loss. Also, regarding power and delay characteristics, different structure domino gates with DTV have different robustness against temperature and process fluctuation.
