Proton irradiation-induced dynamic characteristics on high performance GaN/AlGaN/GaN Schottky barrier diodes

Dynamic characteristics of the single-crystal Ga N-passivated lateral AlGaN/GaN Schottky barrier diodes(SBDs)treated with proton irradiation are investigated.Radiation-induced changes including idealized Schottky interface and slightly degraded on-resistance(RON)are observed under 10-Me V proton irradiation at a fluence of 10^(14)cm^(-2).Because of the existing negative polarization charges induced at GaN/AlGaN interface,the dynamic ON-resistance(RON,dyn)shows negligible degradation after a 1000-s-long forward current stress of 50 mA to devices with and without being irradiated by protons.Furthermore,the normalized RON,dynincreases by only 14%that of the initial case after a 100-s-long bias of-600 V has been applied to the irradiated devices.The high-performance lateral AlGaN/GaN SBDs with tungsten as anode metal and in-situ single-crystal GaN as passivation layer show a great potential application in the harsh radiation environment of space.

Laser cleaning of steel structure surface for paint removal and repaint adhesion

Paint removal from steel structure is executed for shipyards of marine and offshore engineering.Due to environmental unfriendliness and unhealthy drawbacks of sand blasting technique, laser ablation technique is proposed as a substituting method.By absorbing high energy of the 1064 nm pulsed laser, the paint is vaporized quickly.The ablated debris is then collected by using a suction pump.Initial metal surface of the steel is exposed when laser beam irradiates perpendicularly and scans over it.The cleaned surface fulfills the requirements of surface preparation standards ISO 8501 of SA2.The adhesion is further characterized with pull-off test after carrying out painting with Jotamastic 87 aluminum paint.The repainting can be embedded onto the laser cleaned surface to bond much more tightly.The excellent adhesion strength of 20 MPa between repainted coating and the substrate is achieved, which is higher than what is required by shipyards applications.

Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance

Large threshold voltage and small on-state current are the main limitations of the normal tunneling field effect transistor (TFET). In this paper, a novel TFET with gate-controlled P+N+N+ structure based on partially depleted GeOI (PD-GeOI) substrate is proposed. With the buried P+-doped layer (BP layer) introduced under P+N+N+ structure, the proposed device behaves as a two-tunneling line device and can be shut off by the BP junction, resulting in a high on-state current and low threshold voltage. Simulation results show that the on-state current density Ion of the proposed TFET can be as large as 3.4 × 10^−4 A/μm, and the average subthreshold swing (SS) is 55 mV/decade. Moreover, both of Ion and SS can be optimized by lengthening channel and buried P+ layer. The off-state current density of TTP TFET is 4.4 × 10^−10 A/μm, and the threshold voltage is 0.13 V, showing better performance than normal germanium-based TFET. Furthermore, the physics and device design of this novel structure are explored in detail.

A chaos-based image encryption algorithm using alternate structure

Combined with two chaotic maps, a novel alternate structure is applied to image cryptosystem. In proposed algorithm, a general cat-map is used for permutation and diffusion, as well as the OCML （one-way coupled map lattice）, which is applied for substitution. These two methods are operated alternately in every round of encryption process, where two subkeys employed in different chaotic maps are generated through the masterkey spreading. Decryption has the same structure with the encryption algorithm, but the masterkey in each round should be reversely ordered in decryption. The cryptanalysis shows that the proposed algorithm bears good immunities to many forms of attacks. Moreover, the algorithm features high execution speed and compact program, which is suitable for various software and hardware applications.

Total dose irradiation and hot-carrier effects of sub-micro NMOSFETs

Total dose irradiation and the hot-carrier effects of sub-micro NMOSFETs are studied. The results show that the manifestations of damage caused by these two effects are quite different, though the principles of damage formation are somewhat similar. For the total dose irradiation effect, the most notable damage lies in the great increase of the off-state leakage current. As to the hot-carrier effect, most changes come from the decrease of the output characteristics curves as well as the decrease of trans-conductance. It is considered that the oxide-trapped and interface-trapped charges related to STI increase the current during irradiation, while the negative charges generated in the gate oxide, as well as the interface-trapped charges at the gate interface, cause the degradation of the hot-carrier effect. Different aspects should be considered when the device is generally hardened against these two effects.

An anisotropic thermal-stress model for through-silicon via

A two-dimensional thermal-stress model of through-silicon via（TSV） is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of thermalstress in the substrate can be characterized more accurately. TCAD 3-D simulations are used to verify the model accuracy and well agree with analytical results（＆lt; ±5%）. The proposed thermal-stress model can be integrated into stress-driven design flow for 3-D IC, leading to the more accurate timing analysis considering the thermal-stress effect.

A Configurable Circuit for Cross-Correlation in Real-Time Image Matching

Cross-correlation （CC） is the most time-consuming in the implementation of image matching algorithms based on the correlation method. Therefore, how to calculate CC fast is crucial to real-time image matching. This work reveals that the single cascading multiply-accumulate （CAMAC） and concurrent multiply-accumulate （COMAC） architectures which have been widely used in the past, actually, do not necessarily bring about a satisfactory time performance for CC. To obtain better time performance and higher resource efficiency, this paper proposes a configurable circuit involving the advantages of CAMAC and COMAC for a large amount of multiply-accumulate （MAC） operations of CC in exhaustive search. The proposed circuit works in an array manner and can better adapt to changing size image matching in real-time processing. Experimental results demonstrate that this novel circuit which involves the two structures can complete vast MAC calculations at a very high speed. Compared with existing related work, it improves the computation density further and is more flexible to use.