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Parallelization of intra prediction algorithm based on array processor 被引量:5
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作者 Zhu Yun Jiang Lin +2 位作者 Shi Pengfei Xie Xiaoyan Shen Xubang 《High Technology Letters》 EI CAS 2019年第1期74-80,共7页
For the characteristics of intra prediction algorithms, the data dependence and parallelism between intra prediction models are first analyzed. This paper proposes a parallelization method based on dynamic reconfigura... For the characteristics of intra prediction algorithms, the data dependence and parallelism between intra prediction models are first analyzed. This paper proposes a parallelization method based on dynamic reconfigurable array processors provided by the project team, and uses data level parallel(DLP) algorithms in multi-core units. The experimental results show that Y-component of peak signal to noise ratio(Y-PSNR) is improved about 10 dB and the time is saved 63% compared with high-efficiency video coding(HEVC) test model HM10.0. This method can effectively reduce codec time of the video and reduce computational complexity. 展开更多
关键词 high-efficiency video coding(HEVC) intra prediction parallelization mapping
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