Symbolic circuit simulator is traditionally applied to the small-signal analysis of analog circuits. This paper establishes a symbolic behavioral macromodeling method applicable to both small-signal and large-signal a...Symbolic circuit simulator is traditionally applied to the small-signal analysis of analog circuits. This paper establishes a symbolic behavioral macromodeling method applicable to both small-signal and large-signal analysis of general two-stage operational amplifiers （op-amps）. The proposed method creates a two-pole parametric macromodel whose parameters are analytical functions of the circuit element parameters generated by a symbolic circuit simulator. A moment matching technique is used in deriving the analytical model parameter. The created parametric behavioral model can be used for op-amps performance simulation in both frequency and time domains. In particular, the parametric models are highly suited for fast statistical simulation of op-amps in the time-domain. Experiment results show that the statistical distributions of the op-amp slew and settling time characterized by the proposed model agree well with the transistor-level results in addition to achieving significant speedup.展开更多
文摘Symbolic circuit simulator is traditionally applied to the small-signal analysis of analog circuits. This paper establishes a symbolic behavioral macromodeling method applicable to both small-signal and large-signal analysis of general two-stage operational amplifiers （op-amps）. The proposed method creates a two-pole parametric macromodel whose parameters are analytical functions of the circuit element parameters generated by a symbolic circuit simulator. A moment matching technique is used in deriving the analytical model parameter. The created parametric behavioral model can be used for op-amps performance simulation in both frequency and time domains. In particular, the parametric models are highly suited for fast statistical simulation of op-amps in the time-domain. Experiment results show that the statistical distributions of the op-amp slew and settling time characterized by the proposed model agree well with the transistor-level results in addition to achieving significant speedup.
